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FEC

Focused Expression Coverage (FEC)

by Ray Salemi on January 26, 2009

In step one of FPGA Simulation we discussed code coverage and, more specifically, condition coverage and expression coverage.  Condition Coverage and Expression Coverage tell us whether we’ve fully tested a condition in a branch, or an expression in a continuous assignment or concurrent assignment.  In this article, we’ll talk about a new approach to expression/condition […]

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