From the category archives:

2. Test Planning

More Lectures from FPGA Simulation online

by Ray Salemi on March 1, 2010

I am presenting a series of web lectures on the topics in the book FPGA Simulation.  You can view the lectures at www.verificationacademy.net, or just click on this link: Evolving FPGA Verification Capabilities Module | Verification Academy. This week we’ve added three lectures: Step 2: Test Planning Step 4: Transaction Level Test Benches Step 7: [...]

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Free SystemVerilog Simulators?

by Ray Salemi on September 9, 2009

The book FPGA Simulation uses code coverage as its basic measure and SystemVerilog to implement transaction-level simulation.  This raises the question of whether there are any free SystemVerilog simulators that handle code coverage. The short answer is No.  SystemVerilog is an enormous language, and while the original Verilog simulator was written by a single guy, [...]

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Use MindMapping Software to Create Transaction List

by Ray Salemi on April 8, 2009

Xmind is a great tool for capturing channels and transactions.

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